In the current increasingly competitive LCD domain, the IC manufacturers are under tremendous pressure to figure out how to lower power consumption and cost. For the ones who are able to lower chip power consumption, they are viewed as having an advantage with the backend DEMO system manufacturers and thus it would be the winners in the fierce competitive market.
Currently, in the LCD, OLED or other color flat panel technology, using the LCD CSTN display technology as an example, its display relies on a voltage that is applied to the row electrodes and column electrodes in the LCD panel. The differences between the voltages at the electrodes are used to turn on the liquid crystals and hence lighting up the crystals for them to illuminate. During the entire liquid crystals display process, the capacitance created between the row electrodes and column electrodes is turned on sometimes and it is turned off at other times. At the moment of the capacitance being turned on and off, it results in a charge and discharge process that occurs continuously. Being able to control the charge and discharge relationship is extremely crucial to the reduction of power consumption in the system. Considering the liquid crystals response speed and system power consumption issues, the conventional method uses the radial voltage technology to process the driver voltage waveforms outputted from the two neighboring rows of the same column. In other words, in the same column, when the previous row PWM and FRC data changes from 0˜31 (5 PWM and 1 FRC, the same reasoning results in other data embedding the PWM modulation method to vary the PWM power from 0 to 2, 6 FRC as 64 frames, and the first to the last frames are 0 to 63 respectively), the PWM and FRC comparative data for the next immediate row is 31˜0. The voltage waveforms outputted from comparing the two neighboring rows in the same column can achieve a mutual balance and it is a type of technology that can minimize the flip-flop frequency between voltages. Due to the LCD panel response speed problem, this type of technology can create an excellent display contrast. Meanwhile because the voltage flip-flop frequency is lower, likewise, the IC power consumption is also lower.
A typical display driver circuit is shown in FIG. 1. In the column direction, after an address generator generates the scanning addresses for the SRAM, the system sends the SRAM data to the display data latch. Then the data is compared with the comparator and the compared results are processed through the column driver circuit before outputting the desired driver voltage waveforms to the LCD panel. In the row direction, likewise, after the address generator generates the COM (row) scanning addresses, the row driver circuit produces the desired output driver voltage COM waveforms to the LCD panel. A level selecting circuit is in each of the row driver circuit and column driver circuit.
The comparator is shown in FIGS. 2 and 3, it includes the following parts: a modulation counter generating circuit, a radial circuit, a frame modulation circuit, and a comparator. The processing sequence with respect to the radial circuit and the frame modulation circuit is interchangeable. Part of the working procedure for the entire comparator is as follows: after the modulation counter generating circuit generates a part of the data used in PWM modulation, the data variation is 0˜31 sequentially (use 5 PWM as an example); the PWM data is altered through the radial circuit part based on the radial direction method; (processing through the radial circuit before the frame modulation circuit as an example); the data is then processed through the frame modulation circuit where the low position of the PWM data is inserted differently into different FRC data symbols according to the FRC methods; lastly, through the comparator of the displayed data and modulation data, the PWM and FRC modulated data is compared with the displayed data read from SRAM and the corresponding compared results are outputted. Its working principle is: after inputting the data from the modulation counter, part of the radial circuit processes the data based on the odd and even state of the current scanning row. When the scanning row is an odd row, this part of the circuit modulates the data from the modulation counter sequentially from 0˜31 to 31˜0. When the current scanning row is an even row, this part of the circuit directly sends out the data from the modulation counter as 0˜31 sequentially. This type of condition where the neighboring odd and even rows modulation counter output data is opposite can result in an opposite output of the driver voltage waveforms in the odd and even rows of this same column. After the driver voltage waveform of an odd row in any one column changes from high to low, the driver voltage waveform of the next immediate even row changes from low to high, resulting in a radial voltage effect in the row direction.
In the original technology for the LCD column driving methods, since it is only in the column direction where the comparative data from the modulation counter is modulated making it opposite, therefore, only a row direction radial exists. Its waveform is shown in FIG. 7. The output driver voltages in different columns are the same. If at any time the voltage inversion control signal (M) is unchanged, the voltage for the COM direction is V5, the column selecting voltage is V6, the un-selecting voltage is V4. When any one column voltage changes from V6 to V4, the capacitance created at the intersection of the COM (row) and SEG (column) electrodes must discharge. (capacitance second level voltage changes from V5, V6 to V5, V4) The discharge relationship is V5 discharges to V4. Under the condition when the neighboring data is similar, the same change occurs to the neighboring columns of the same row where V5 discharges to V4. This results in the odd columns and even columns to discharge in a uniform direction V4. The V4 then discharges completely and thus part of the discharge electric charge is a complete waste and in the meantime, the current passing through V5 is 2 I (for example); conversely, when any one column voltage changes from V4 to V6, the same thing happens to the neighboring column of the same row where the voltages change from V4 to V6. Then the odd columns and even columns charge V5 in a uniform direction while the current passing through V5 is 2 I. As seen, since the charge and discharge process is absolutely uniform, it is either charging or discharging at a given moment and there is no overlap between the charge and discharge processes; therefore, the electric charge cannot mutually compensate. It eventually causes the voltage flip-flop process to incur significant dissipation of electric charge. This leads to substantial power consumption by the panel and thus inherently high system cost.